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july 2009 doc id 14617 rev 4 1/44 1 vnd5e050aj-e vnd5e050ak-e double channel high side driv er with analog current sense for automotive applications features general ? inrush current active management by power limitation ? very low standby current ? 3.0 v cmos compatible inputs ? optimized electromagnetic emissions ? very low electromag netic susceptibility ? in compliance with the 2002/95/ec european directive ? very low current sense leakage diagnostic functions ? proportional load current sense ? high current sense precision for wide currents range ? current sense disable ? off-state open load detection ? output short to v cc detection ? overload and short to ground (power limitation) indication ? thermal shutdown indication protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? over temperature shutdown with auto restart (thermal shutdown) ? reverse battery protected (see figure 32 ) ? electrostatic discharge protection applications all types of resistive, inductive and capacitive loads suitable as led driver description the vnd5e050aj-e and vnd5e050ak-e are double channel high-side drivers manufactured in the st proprietary vipower m0-5 technology and housed in the tiny powersso-12 and powersso- 24 packages. the vnd5e050aj-e and vnd5e050ak-e are designed to drive 12v automotive grounded loads delivering protection, diagnostics and easy 3v and 5v cmos compatible interface with any microcontroller. the devices integrate advanced protective functions such as load cu rrent limitatio n, inrush and overload active management by power limitation, over-tempe rature shut-off with auto-restart and over-voltage active clamp. a dedicated analog current sense pin is associated with every output channel in order to provide enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitatio n indication, over- temperature indication, short-circuit to vcc diagnosis and on & off state open load detection. the current sensing and diagnostic feedback of the whole device can be disabled by pulling the cs_dis pin high to allow sharing of the external sense resistor with other similar devices. max transient supply voltage v cc 41 v operating voltage range v cc 4.5 to 28 v max on-state resistance (per ch.) r on 50 m current limitation (typ) i limh 27 a off-state supply current i s 2 a (1) 1. typical value with all loads connected. powersso-24 powersso-12 www.st.com
contents vnd5e050aj-e / vnd5e050ak-e 2/44 doc id 14617 rev 4 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.5 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 25 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 25 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 26 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.4 current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.4.1 short to vcc and off-state open load detection . . . . . . . . . . . . . . . . . . 27 3.5 maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . . . . . . . 29 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.1 powersso-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.2 powersso-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.2 powersso-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.3 powersso-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.4 powersso-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 5.5 powersso-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
vnd5e050aj-e / vnd5e0 50ak-e list of tables doc id 14617 rev 4 3/44 list of tables table 1. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc = 13v; tj = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 9. current sense (8v list of figures vnd5e050aj-e / vnd5e050ak-e 4/44 doc id 14617 rev 4 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 5. open load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 6. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. delay response time between rising edge of output current and rising edge of current sense (cs enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. i out /i sense vs i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 10. maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 11. normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 12. overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 13. intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 14. off-state open load with external circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 15. short to v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 16. t j evolution in overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 17. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 18. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 19. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 20. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 21. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 22. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 23. on-state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 24. on-state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 25. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 26. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 27. ilimh vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 28. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 29. cs_dis high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 30. cs_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 31. cs_dis low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 32. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 33. current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 34. maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 29 figure 35. powersso-12 pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 36. rthj-amb vs. pcb copper area in open box free air condition (one channel on) . . . . . . . 30 figure 37. powersso-12 thermal impedance junction ambient single pulse (one channel on). . . . . 31 figure 38. thermal fitting model of a double channel hsd in powersso-12 . . . . . . . . . . . . . . . . . . . 31 figure 39. powersso-24 pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 40. rthj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . 33 figure 41. powersso-24 thermal impedance junction ambient single pulse (one channel on). . . . . 34 figure 42. thermal fitting model of a double channel hsd in powersso-24 . . . . . . . . . . . . . . . . . . . 34 figure 43. powersso-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 44. powersso-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 figure 45. powersso-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 figure 46. powersso-12 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 figure 47. powerss0-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
vnd5e050aj-e / vnd5e0 50ak-e list of figures doc id 14617 rev 4 5/44 figure 48. powersso-24 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
block diagram and pin descript ion vnd5e050aj-e / vnd5e050ak-e 6/44 doc id 14617 rev 4 1 block diagram and pin description figure 1. block diagram table 1. pin function name function v cc battery connection. output 1,2 power output. gnd ground connection. must be reverse battery protected by an external diode/resistor network. input 1,2 voltage controlled input pin with hysteres is, cmos compatible. controls output switch state. current sense 1,2 analog current sense pin, delivers a curre nt proportional to the load current. cs_dis active high cmos compatible pin, to disable the current sense pin. v cc ch 1 control & diagnostic 1 logic driver v on limitation current limitation power clamp off state open load over temp. undervoltage v senseh current sense ch 2 overload protection (active power limitation) in1 in2 cs1 cs2 cs_ dis gnd out2 out1 signal clamp control & diagnostic channels 2
vnd5e050aj-e / vnd5e0 50ak-e block diagram and pin description doc id 14617 rev 4 7/44 figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input cs_dis floating not allowed x x x x to ground through 1 k resistor x through 22 k resistor through 10 k resistor through 10 k resistor powersso-12 ta b = v cc v cc output2 output1 output1 v cc output2 12 11 10 9 8 7 1 2 3 4 5 6 cs_dis gnd input1 current sense1 input2 current sense2 n.c. input1 gnd v cc n.c. input2 cs_dis. v cc current sense1 n.c. n.c. current sense2 output2 output2 output2 output2 output2 output2 output1 output1 output1 output1 output1 output1 powersso-24 tab = v cc
electrical specifications vnd 5e050aj-e / vnd5e050ak-e 8/44 doc id 14617 rev 4 2 electrical specifications figure 3. current and voltage conventions note: v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implie d. exposure to the conditions in table below for extended periods may affect device reliability. refer al so to the stmicroelectronics sure program and other relevant quality document. i s i gnd v cc v cc v sense2 output1 i out1 current i sense1 input1 i in1 v in2 v out2 gnd cs_dis i csd v csd input2 i in2 v in1 sense1 output2 i out2 current i sense2 sense2 v sense1 v out1 v fn table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 0.3 v -i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a -i out reverse dc output current 20 a i in dc input current -1 to 10 ma i csd dc current sense disable input current -1 to 10 ma -i csense dc reverse cs pin current 200 ma v csense current sense maximum voltage v cc - 41 to +v cc v
vnd5e050aj-e / vnd5e050ak- e electrical specifications doc id 14617 rev 4 9/44 2.2 thermal data 2.3 electrical characteristics values specified in th is section are for 8 v electrical specifications vnd 5e050aj-e / vnd5e050ak-e 10/44 doc id 14617 rev 4 i s supply current off-state; v cc = 13v; t j = 25c; v in =v out =v sense =v csd =0v 2 (2) 5 (2) a on-state; v cc = 13v; v in = 5v; i out =0a 36ma i l(off1) off-state output current (1) v in =v out = 0v; v cc = 13v; t j =25c 00.013 a v in =v out = 0v; v cc = 13v; t j =125c 05 v f output - v cc diode voltage (1) -i out = 4a; t j = 150c 0.7 v 1. for each channel. 2. powermos leakage included. table 6. switching (v cc =13v; t j = 25c) symbol parameter test cond itions min. typ. max. unit t d(on) turn-on delay time r l = 6.5 (see figure 6 )20 s t d(off) turn-off delay time r l = 6.5 (see figure 6 )45 s dv out /dt (on) turn-on voltage slope r l = 6.5 see figure 26 v / s dv out /dt (off) turn-off voltage slope r l = 6.5 see figure 28 v / s w on switching energy losses during t won r l = 6.5 (see figure 6 )0.15 mj w off switching energy losses during t woff r l = 6.5 (see figure 6 )0.3 mj table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in =0.9v 1 a v ih input high level voltage 2.1 v i ih high level input current v in =2.1v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in =1ma 5.5 7 v i in =-1ma -0.7 v csdl cs_dis low level voltage 0.9 v i csdl low level cs_dis current v csd =0.9v 1 a table 5. power section (continued) symbol parameter test conditions min. typ. max. unit
vnd5e050aj-e / vnd5e050ak- e electrical specifications doc id 14617 rev 4 11/44 v csdh cs_dis high level voltage 2.1 v i csdh high level cs_dis current v csd =2.1v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis clamp voltage i csd =1ma 5.5 7 v i csd =-1ma -0.7 table 8. protections and diagnostics (1) 1. to ensure long term reliability under heavy overload or s hort circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc =13v 5v electrical specifications vnd 5e050aj-e / vnd5e050ak-e 12/44 doc id 14617 rev 4 k 2 i out /i sense i out = 2a; v sense = 4v;v csd = 0v; t j = -40c...150c t j = 25c...150c 1900 1899 2000 2000 2395 2282 dk 2 /k 2 (1) current sense ratio drift i out = 2 a; v sense = 4 v; v csd =0v; t j = -40 c to 150 c -9 9 % k 3 i out /i sense i out = 4a; v sense = 4v;v csd = 0v; t j = -40c...150c t j = 25c...150c 1969 1950 1990 1990 2210 2153 dk 3 /k 3 (1) current sense ratio drift i out = 4 a; v sense = 4 v; v csd = 0v; t j = -40 c to 150 c -6 6 % i sense0 analog sense leakage current i out = 0a; v sense =0v; v csd =5v; v in =0v; t j = -40c...150c v csd = 0v; v in =5v; t j = -40c...150c 0 0 1 2 a i out = 2a; v sense = 0v; v csd = 5v; v in = 5v; t j = -40c...150c 01 i ol open load on-state current detection threshold v in = 5v, 8v vnd5e050aj-e / vnd5e050ak- e electrical specifications doc id 14617 rev 4 13/44 figure 4. current sense delay characteristics t dsen se 2h delay response time between rising edge of output current and rising edge of current sense v sense <4v, i sense = 90% of i sensemax, i out = 90% of i outmax i outmax = 2a (see figure 7 ) 40 s t dsense2l delay response time from falling edge of input pin v sense <4v, 0.5a electrical specifications vnd 5e050aj-e / vnd5e050ak-e 14/44 doc id 14617 rev 4 figure 5. open load off-state delay timing figure 6. switching characteristics v in v cs t dstkon output stuck to v cc v out > v ol v senseh v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff
vnd5e050aj-e / vnd5e050ak- e electrical specifications doc id 14617 rev 4 15/44 figure 7. delay response time between rising edge of output current and rising edge of current sense (cs enabled) figure 8. output voltage drop limitation v in i out i sense i outmax i sensemax 90% i sensemax 90% i outmax t dsense2h t t t v on i out v cc -v out t j =150 o c t j =25 o c t j =-40 o c v on /r on(t)
electrical specifications vnd 5e050aj-e / vnd5e050ak-e 16/44 doc id 14617 rev 4 figure 9. i out /i sense vs i out figure 10. maximum current sense ratio drift vs load current note: parameter guaranteed by design; it is not tested. 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 11,522,533,54 i out (a) i out / i sense max tj = -40 c to 150 c max tj = 25 c to 150 c min tj = 25 c to 150 c min tj = -40 c to 150 c typical value -20 -15 -10 -5 0 5 10 15 20 1234 i out (a) dk/k(%)
vnd5e050aj-e / vnd5e050ak- e electrical specifications doc id 14617 rev 4 17/44 table 11. truth table conditions input output sense (v csd =0v) (1) 1. if the v csd is high, the sense output is at a high impedance, its potential depends on leakage currents and external circuit. normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overload h h x (no power limitation) cycling (power limitation) nominal v senseh short circuit to gnd (power limitation) l h l l 0 v senseh open load off-state (with external pull-up) lhv senseh short circuit to v cc (external pull-up disconnected) l h h h v senseh < nominal negative output voltage clamp ll0
electrical specifications vnd 5e050aj-e / vnd5e050ak-e 18/44 doc id 14617 rev 4 table 12. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5v except for pulse 5b. number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv min. max. 1 -75v -100v 5000 pulses 0.5s 5s 2 ms, 10 2a +37v +50v 5000 pulses 0.2s 5s 50s, 2 3a -100v -150v 1h 90ms 100ms 0.1s, 50 3b +75v +100v 1h 90ms 100ms 0.1s, 50 4 -6v -7v 1 pulse 100ms, 0.01 5b (2) 2. valid in case of external load dump clamp: 40v maximum referred to ground. +65v +87v 1 pulse 400ms, 2 table 13. electrical transient requirements (part 2) iso 7637-2: 2004e test pulse test level results iii vi 1c c 2a c c 3a c c 3b c c 4c c 5b (1) 1. valid in case of external load dump clamp: 40v maximum referred to ground. cc table 14. electrical transient requirements (part 3) class contents c all functions of the device performed as designed after exposure to disturbance. e one or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
vnd5e050aj-e / vnd5e050ak- e electrical specifications doc id 14617 rev 4 19/44 2.4 waveforms figure 11. normal operation figure 12. overload or short to gnd i out v sense v cs_dis input nominal load nominal load normal operation power limitation i limh > i liml > i out v sense v cs_dis input thermal cycling overload or short to gnd
electrical specifications vnd 5e050aj-e / vnd5e050ak-e 20/44 doc id 14617 rev 4 figure 13. intermittent overload figure 14. off-state open load with external circuitry i out v sense v cs_dis input i limh > nominal load intermittent overload i liml > overload v senseh > input off-state open load with external circuitry v ol i out v sense v cs_dis v out v out > v ol t dstk(on) v senseh >
vnd5e050aj-e / vnd5e050ak- e electrical specifications doc id 14617 rev 4 21/44 figure 15. short to v cc figure 16. t j evolution in overload or short to gnd t dstk(on) v out > v ol resistive short to v cc hard short to v cc short to v cc i out v cs_dis v out v ol t dstk(on) t tsd t r t j evolution in overload or short to gnd i limh > < i liml t j_start t hyst power limitation self-limitation of fast thermal transients input i out t j
electrical specifications vnd 5e050aj-e / vnd5e050ak-e 22/44 doc id 14617 rev 4 2.5 electrical char acteristics curves figure 17. off-state output current figure 18. high level input current -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 iloff (na) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 iih (a) vin=2.1v figure 19. input clamp voltage figure 20. input low level -50 -25 0 25 50 75 100 125 150 175 tc (c) 5 5,2 5,4 5,6 5,8 6 6,2 6,4 6,6 6,8 7 vicl (v) lin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 vil (v) figure 21. input high level figure 22. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1 vihyst (v)
vnd5e050aj-e / vnd5e050ak- e electrical specifications doc id 14617 rev 4 23/44 figure 23. on-state resistance vs t case figure 24. on-state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 ron (mohm) iout= 2a vcc=13v 0 5 10 15 20 25 30 35 40 vcc (v) 0 20 40 60 80 100 ron (mohm) tc=-40c tc=25c tc=125c tc=150c figure 25. undervoltage shutdown figure 26. turn-on voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 2 4 6 8 10 12 14 16 vusd (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 100 200 300 400 500 600 700 800 900 1000 (dvout/dt )on (v/ms) vcc=13v ri=6.5 ohm figure 27. i limh vs t case figure 28. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 10 15 20 25 30 35 40 ilimh (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 600 (dvout/dt )off (v/ms) vcc=13v ri= 6.5 ohm
electrical specifications vnd 5e050aj-e / vnd5e050ak-e 24/44 doc id 14617 rev 4 figure 29. cs_dis high level voltage figure 30. cs_dis clamp voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vcsdh (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 8 9 10 vcsdcl(v) icsd = 1 ma figure 31. cs_dis low level voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 vcsdl (v)
vnd5e050aj-e / vnd5e050 ak-e application information doc id 14617 rev 4 25/44 3 application information figure 32. application schematic note: channel 2 has the same internal circuit as channel 1. 3.1 gnd protection network against reverse battery this section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1: resist or in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600mv / (i s(on)max ) 2. r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how ma ny devices are on in the case of several high side drivers sharing the same r gnd . v cc gnd output d gnd r gnd d ld cu +5v v gnd cs_dis input r prot r prot current sense r sense r prot c ext
application information vnd 5e050aj-e / vnd5e050ak-e 26/44 doc id 14617 rev 4 if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggests to utilize section 3.1.2: solution 2: diode (dgnd) in the ground line . 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd =1k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the grou nd network will produce a shift ( 600mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift will not vary if more than one hsd shares t he same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2: 2004(e) table. 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/o s (input levels compatibility) with the latch-up limit of c i/os: -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 20ma; v ohc 4.5v 5k r prot 180k recommended values: r prot =10k , c ext =10nf. 3.4 current sense and diagnostic the current sense pin performs a double function (see figure 33: current sense and diagnostic ): current mirror of the load cu rrent in normal operation, delivering a current proportional to the load one according to a know ratio k x . the current i sense can be easily converted to a voltage v sense by means of an external resistor r sense . linearity between i out and v sense is ensured up to 5v minimum (see parameter v sense in table 9: current sense (8v vnd5e050aj-e / vnd5e050 ak-e application information doc id 14617 rev 4 27/44 current sense accuracy depends on the output current (refer to current sense electrical characteristics table 9: current sense (8v application information vnd 5e050aj-e / vnd5e050ak-e 28/44 doc id 14617 rev 4 it is preferable v pu to be switched off during the module stand-by mode in order to avoid the overall stand-by current consumption to increase in normal conditions, i.e. when load is connected. an external pull down resistor r pd connected between output and gnd is mandatory to avoid misdetection in case of floating outputs in off-state (see figure 33: current sense and diagnostic ). r pd must be selected in order to ensure v out < v olmin unless pulled up by the external circuitry: r pd 22 k is recommended. for proper open load detection in off-state, the external pull-up resistor must be selected according to the following formula: for the values of v olmin ,v olmax , i l(off2)r and i l(off2)f see table 10: open load detection (8v + ? ? ? ? = ?
vnd5e050aj-e / vnd5e050 ak-e application information doc id 14617 rev 4 29/44 3.5 maximum demagnetization energy (v cc = 13.5v) figure 34. maximum turn-off current versus inductance (for each channel) note: values are generated with r l =0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. 1 10 100 0,1 1 10 100 l (mh) i (a) c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse demagnetization demagnetization demagnetization t v in , i l a b c
package and pcb thermal data vnd5e050aj-e / vnd5e050ak-e 30/44 doc id 14617 rev 4 4 package and pcb thermal data 4.1 powersso-12 thermal data figure 35. powersso-12 pc board note: layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area= 77mm x 86mm,pcb thickness=1.6mm, cu thickness=70m (front and back side), copper areas: from minimum pad lay-out to 8cm 2 ). figure 36. r thj-amb vs. pcb copper area in open box free air condition (one channel on) 30 35 40 45 50 55 60 65 70 0246810 rthj_amb(c/ w) pcb cu heatsink area (cm^ 2)
vnd5e050aj-e / vnd5e050ak-e package and pcb thermal data doc id 14617 rev 4 31/44 figure 37. powersso-12 thermal impedan ce junction ambient single pulse (one channel on) equation 1: pulse calculation formula figure 38. thermal fitting model of a double channel hsd in powersso-12 (a) a. the fitting model is a simplified thermal tool and is valid for trans ient evolutions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. 0,1 1 10 100 0,0001 0,001 0,01 0,1 1 10 100 1000 time ( s) zth (c/ w) footprint 8 cm 2 2 cm 2 z th r th z thtp 1 ? () + ? = where t p t ? =
package and pcb thermal data vnd5e050aj-e / vnd5e050ak-e 32/44 doc id 14617 rev 4 4.2 powersso-24 thermal data figure 39. powersso-24 pc board note: layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area= 77mm x 86mm, pcb thickness=1.6mm, cu thickness=70m (front and back side), copper areas: from minimum pad lay-out to 8cm 2 ). table 15. thermal parameters area/island (cm 2 )footprint28 r1=r7 (c/w) 0.7 r2=r8 (c/w) 2.8 r3 (c/w) 4 r4 (c/w) 8 8 7 r5 (c/w) 22 15 10 r6 (c/w) 26 20 15 c1=c7 (w.s/c) 0.001 c2=c8 (w.s/c) 0.0025 c3 (w.s/c) 0.05 c4 (w.s/c) 0.2 0.1 0.1 c5 (w.s/c) 0.27 0.8 1 c6 (w.s/c) 3 6 9
vnd5e050aj-e / vnd5e050ak-e package and pcb thermal data doc id 14617 rev 4 33/44 figure 40. r thj-amb vs pcb copper area in open box free air condition (one channel on) 30 35 40 45 50 55 0246810 rthj_amb(c/w) pcb cu heatsink area (cm^2)
package and pcb thermal data vnd5e050aj-e / vnd5e050ak-e 34/44 doc id 14617 rev 4 figure 41. powersso-24 thermal impedan ce junction ambient single pulse (one channel on) equation 2: pulse calculation formula figure 42. thermal fitting model of a double channel hsd in powersso-24 (b) b. the fitting model is a simplified thermal tool and is valid for trans ient evolutions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. z th r th z thtp 1 ? () + ? = where t p t ? =
vnd5e050aj-e / vnd5e050ak-e package and pcb thermal data doc id 14617 rev 4 35/44 table 16. thermal parameters area / island (cm 2 )footprint 2 8 r1= r7 (c/w) 0.4 r2= r8 (c/w) 2 r3 (c/w) 6 r4 (c/w) 7.7 r5 (c/w) 9 9 8 r6 (c/w) 28 17 10 c1= c7 (w.s/c) 0.001 c2= c8 (w.s/c) 0.0022 c3 (w.s/c) 0.025 c4 (w.s/c) 0.75 c5 (w.s/c) 1 4 9 c6 (w.s/c) 2.2 5 17
package and packing information vnd5e050aj-e / vnd5e050ak-e 36/44 doc id 14617 rev 4 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack? packages, depending on their level of environmental compliance. ecopack? specifications, grade definitions and product status are available at: www.st.com . ecopack? is an st trademark. 5.2 powersso-12 package information figure 43. powersso-12 package dimensions
vnd5e050aj-e / vnd5e050ak-e package and packing information doc id 14617 rev 4 37/44 table 17. powersso-12 mechanical data symbol millimeters min. typ. max. a 1.25 1.62 a1 0 0.1 a2 1.10 1.65 b 0.23 0.41 c 0.19 0.25 d4.8 5.0 e3.8 4.0 e0.8 h5.8 6.2 h 0.25 0.5 l 0.4 1.27 k0 8 x1.9 2.5 y3.6 4.2 ddd 0.1
package and packing information vnd5e050aj-e / vnd5e050ak-e 38/44 doc id 14617 rev 4 5.3 powersso-24 pa ckage information figure 44. powersso-24 package dimensions
vnd5e050aj-e / vnd5e050ak-e package and packing information doc id 14617 rev 4 39/44 table 18. powersso-24 mechanical data (1) (2) 1. no intrusion allowed inwards the leads. 2. flash or bleeds on exposed die pad shall not exceed 0.5 mm per side symbol millimeters min. typ. max. a 2.45 a2 2.15 2.35 a1 0 0.1 b0.33 0.51 c0.23 0.32 d (3) 3. ?d and e? do not include mold flash or protusions. mold flash or protusions shall not exceed 0.15 mm per side 10.10 10.50 e (3) 7.40 7.60 e0.8 e3 8.8 f2.3 g 0.1 h 10.1 10.5 h 0.4 k0 8 l0.55 0.85 o1.2 q0.8 s2.9 t3.65 u1.0 n 10 x4.1 4.7 y6.5 7.1
package and packing information vnd5e050aj-e / vnd5e050ak-e 40/44 doc id 14617 rev 4 5.4 powersso-12 packing information figure 45. powersso-12 tube shipment (no suffix) figure 46. powersso-12 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a1.85 b6.75 c ( 0.1) 0.6 a c b base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d ( 0.05) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.1) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
vnd5e050aj-e / vnd5e050ak-e package and packing information doc id 14617 rev 4 41/44 5.5 powersso-24 packing information figure 47. powerss0-24 tube shipment (no suffix) figure 48. powersso-24 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base qty 49 bulk qty 1225 tube length (0.5) 532 a 3.5 b 13.8 c (0.1) 0.6 a c b base qty 1000 bulk qty 1000 a (max) 330 b (min) 1.5 c (0.2) 13 f 20.2 g (+2 / -0) 24.4 n (min) 100 t (max) 30.4 reel dimensions tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 (0.1) 4 component spacing p 12 hole diameter d (0.05) 1.55 hole diameter d1 (min) 1.5 hole position f (0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 (0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets sealed with cover tape. user direction of feed
order codes vnd5e050aj-e / vnd5e050ak-e 42/44 doc id 14617 rev 4 6 order codes table 19. device summary package order codes tube tape and reel powersso-12 vnd5e050aj-e VND5E050AJTR-E powersso-24 vnd5e050ak-e vnd5e050aktr-e
vnd5e050aj-e / vnd5e0 50ak-e revision history doc id 14617 rev 4 43/44 7 revision history table 20. document revision history date revision changes 01-apr-2008 1 initial release. 05-mar-2009 2 changed table 18: powersso-24 mechanical data 19-jun-2009 3 table 18: powersso-24 mechanical data : ? changed l (min) value from 0.6 to 0.55 ? changed l (max) value from 1 to 0.85 22-jul-2009 4 updated figure 44: powersso-24 package dimensions .
vnd5e050aj-e / vnd5e050ak-e 44/44 doc id 14617 rev 4 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military , air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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